STL Container Types

 


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FFMPEG Deinterlacing Modes

FFMPEG has multiple supported deinterlacing filters.  Here they are: 10.14 bwdif Deinterlace the input video ("bwdif" stands for "Bob Weaver Deinterlacing Filter"). Motion adaptive deinterlacing based on yadif with the use of w3fdif and cubic interpolation algorithms. It accepts the following parameters: mode The interlacing mode to adopt. It accepts one of the following values: 0, send_frame Output one frame for each frame. 1, send_field Output one frame for each field. The default value is send_field. parity The picture field parity assumed for the input interlaced video. It accepts one of the following values: 0, tff Assume the top field is first. 1, bff Assume the bottom field is first. -1, auto Enable automatic detection of field parity. The default value is auto. If the interlacing is unknown or the decoder does not export this information, top field first will be assumed. deint Specify which frames to deinterlace. Accept ...
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HDR Research

Overview We are looking at what it would take to encode HDR-10 and Dolby Vision videos using an AVC/HEVC encoder. HDR-10 : 10-bit HDR, BT.2020, PQ transfer function, static metadata Dolby Vision : 12-bit HDR (10bit YUV + deltas defined in metadata = 12 bit), BT.2020, PQ transfer function, Dolby Vision dynamic metadata  What is HDR-10? From  this  paper, we have gleaned the following: Essentially, HDR-10 is defined as the combination of the following container and coding characteristics: Color container/primaries: BT.2020 PQ Transfer function (OETF/EOTF): SMPTE ST 2084 Representation: Non Constant Luminance (NCL) YCbCr Sampling: 4:2:0 Bit Depth: 10 bits Metadata: SMPTE ST 2086, MaxFALL, MaxCLL,  AVC/HEVC Supplemental enhancement information (SEI) Messages. Encoding using: HEVC Main 10 profile or AVC High 10. The AVC/HEVC specifications support all of these features as well as metadata (SEI) that can specify the mastering and brightness limitat...
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VP9 Video Encoding/Decoding Support On A PC

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Introduction Video decoding/encoding can take place in the following four types of silicon: 1. General purpose CPU silicon (x86, ARM, SSE, AVX, …) 2. Dedicated CPU silicon (Intel QuickSync, AMD VideoCoreNext) 3. General purpose GPU silicon (cores) (GPGPU, Cuda, OpenCL, Shaders, …) 4. Dedicated GPU silicon (NVidia PureVideo (decode), NVida NVENC (encode)) (Table 1) When video is encoded or decoded any combination of the above silicon can be used. Being this paper is focused on everyday PCs, I’ve left out things like FPGAs, but you could consider an FPGA solution to be more like a general purpose GPU silicon solution. Note, at times this paper uses the term SIP (Semiconductor Intellectual Property core) to denote dedicated encode/decode silicon. Encoding and decoding of video has a defined pipeline: When encoding or decoding video, any one of those colored blocks can be done in hardware or software.   Sometimes a full software approach is ...
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